The present invention relates to a planar diffusion process for manufacturing monolithic integrated circuits comprising at least one pair of complementary bipolar planar transistor components, i.e. comprising at least one planar pnp-transistor and at least one npn-transistor.
In "IEEE Journal of Solid-State Circuits" (April 1972), pp. 170/171, two different processes for manufacturing bipolar complementary structures are described, each comprising a pair of non-lateral planar transistor components. The present invention proceeds from such bipolar complementary structures comprising non-lateral planar transistor components, because the electrical properties thereof can be better adapted to one another than in the case of a bipolar complementary structure comprising a lateral planar transistor. In describing the invention, brief reference is made to the planar diffusion methods of the two processes, namely of the complementary Standard process and of the complementary Stanford process.
The disadvantages of the aforementioned processes are partly overcome by a planar diffusion process described by R. G. Donald in the journal "Solid-State Electronics", Vol. 13, (1970), pp. 815 to 824, and which hereinafter is referred to as the Donald process. This planar diffusion process too, has certain disadvantages with respect to the breakdown voltages of the planar transistor components and the tolerances of diffused resistance elements with squeezed resistance zones which are required for realizing a monolithic integrated (solid-state) circuit. These disadvantages will be referred to in detail hereinafter. The invention proceeds from the planar diffusion method of the Donald process.